Make files consist of macros and targets. Each target consists of a
filename, some dependencies and some commands. There are some targets,
called suffixes, that do not have commands. There are some targets with
commands but no dependencies. The commands are not processed by make; they
are processed by the shell. The shell in other systems are like the command
processor (command prompt windows) in Windows.
The actions in a makefile are in the format:
- target: dependencies
Targets can exist without dependencies, in which case they are something
to be done but not made. A target that does not exist is out-of-date.
A dependency can be a target.
Make will first check to ensure that a target exists and has a later date
than the dependency. If the target does not exist or if the depenency is
newer then the target is built using the command(s).
Make makes targets.
Macro definitions are of the format:
something = whatever something is
Macros are used as in "$(something)".
Environment variables can be used as macros.